The present invention relates to an analog/digital (A/D) converter of a digital multimeter and more particularly to an automatic reference voltage controller of the integral A/D converter which can control a reference voltage of the integral A/D converter automatically so as to reduce output errors of the multimeter due to limit errors of an amplifier of a Miller integrator in the integral A/D converter.
In a conventional integral A/D converter as shown in FIG. 1, a reference voltage switching circuit 1 is to switch a base voltage VC and a reference voltage VREF and an input voltage switching circuit 2 is to switch an input voltage VIN, the base voltages VC, and the reference voltage VREF. The reference voltage switching part 1 and the input voltage, switching part 2 are connected to a noninverting terminal (+) and an inverting terminal (-) of an operational amplifier OP of a Miller integrator 3, respectively.
The reference voltage switching circuit 1 comprises two switches S1 and S4. while the input voltage switching circuit 2 comprises three switches S2, S3 and S5.
The Miller integrator 3 is connected to a comparing circuit 4 with output terminals thereof and comprises the amplifier OP, a resistor R, and two capacitors C1 and C2. The comparing circuit 4 is to compare an output voltage of the input switching circuit 2 with an output voltage VO of the Miller integrator 3. The comparing circuit 4 comprises a comparator COMP1 and a feedback switch S6. A logic circuit 5 is connected to output terminals of the comparing circuit 4 so that an output of the comparing circuit 4 is stored in the logic circuit 5 to be provided as a digital signal after A/D conversion.
In this integral A/D converter, the switch S1 in the reference voltage switching circuit 1, the switch S2 in the input voltage switching circuit 2 are turned on at the same time for a predetermined period T1, as shown in FIG. 2A. That is, the noninverting terminal (+) of the Miller integrator 3 is applied with the base voltage VC and no current is supplied through the resistor R and the capacitor C1. Thus, the output voltage VO of the amplifier OP in the Miller integrator 3 is the same as the base voltage VC.
The output voltage VO of the Miller integrator 3 is provided to the noninverting terminal (+) of the comparator COMP1 in the comparing circuit 4 and compared with the base voltage VC applied to the inverting terminal (-) of the comparator COMP1. The comparing part 4 is provided with the base voltage VC, where the feedback switch S6 in the comparing circuit 4 is turned on so that the base voltage VC provided from the comparing part 4 is stored in the logic circuit part 5.
On the other hand, for a predetermined period T2, the switch S1 in the reference voltage switching part 1 and the switch S3 in the input voltage switching circuit 2 are turned on at the same time. Accordingly, the output base voltage VC of the reference voltage switching circuit 1 remains, while the output of the input voltage switching circuit 2 is changed to the input voltage VIN. Thus, the current flows through the resistor R and the capacitor C1 and the output voltage VO of the Miller integrator 3 is given by a linear function of time, as shown in FIG. 2B. That is, ##EQU1## The final value of the output voltage VO becomes ##EQU2## The output voltage VO of the Miller integrator 3 is compared with the input voltage VIN in the comparing circuit 4, and then output of the comparator COMPI becomes a low level state as shown in FIG. 2C(A). The low level output of the comparing circuit 4 is stored in the logic circuit 5.
FIG. 2C(B) shows the output voltage of the comparator COMP1 in case that the input voltage VIN has a smaller value than the base voltage VC. In FIG. 2B, the output voltage VO of the Miller integrator 3 is shown by a linear function of time as follows: ##EQU3## where the final value is ##EQU4## And the output voltage VO of the Miller integrator 3 is applied to the comparing circuit 4 and provided in a high level state as shown in FIG. 2C(B).
On the other hand, the switch S4 in the reference voltage switching circuit 1 and the switch S2 in the input voltage switching circuit 2 are turned on at the same time and the switches S2, S4 are turned off when the comparator provides a high level output. That is, the reference voltage of the Miller integrator 3 becomes an added value of the base voltages VC and the reference voltage VREF, while the input voltage VIN becomes the base voltage VC.
FIG. 2B(A) is shown a linear function of time for the output voltage VO of the Miller integrator 3, wherein ##EQU5## where the Vo' is the final value of the period T2.
Similarly, the output of the Miller integrator 3 is compared with the reference voltage VREF in the comparing circuit 4 and provided to the logic circuit 5 to be stored, so that the comparing circuit 5 provides a digital output.
To the contrary, the switch S1 in the reference voltage switching circuit 1 and the switch S5 in the input voltage switching circuit 2 are turned on instead of the switches S2 and S4 if the input voltage VIN is smaller value the base voltage Vc during the period T2, the Miller integrator 3 is provided with an input voltage VREF+VO. Accordingly, the output voltage VO of the Miller integrator 3 is shown as follows: ##EQU6## where the Vo' is the final value of the period T2.
Also, the output voltage VO of the Miller integrator 3 is applied to the comparing part 4 to be compared with the output voltage of the reference voltage switching circuit 1 and provided in a high level state.
FIG. 2B shows all the periods T1.about.T3. The digital output signals are provided by repeating these steps. But, there is a problem that the digital output signals can not agree with the input voltage VIN accurately due to the limit error of the amplifier OP in the Miller integrator 3. In order to solve this problem, the reference voltage VREF should be manually controlled.